In microelectronics, and in particular in the semiconductor industry, the use of aluminium as an interconnect material has been declining. Copper has become the preferred interconnect material. The use of aluminium is being phased out for two main reasons: aluminium's relatively high resistivity (2.65×10−6 ohm.cm) and electromigration.
The use of copper in place of aluminium overcomes both the resistivity and electromigration problems to some extent. Resistivity in copper is lower than that of aluminium (1.67×10−6 ohm.cm) and the higher mass and higher melting point of copper (1085° C. compared to 660° C. for Al) results in the lower susceptibility to electromigration. As a result higher current densities can be allowed at a given packing density provided copper interconnects replace aluminium ones.
During the 1980's, a typical feature size in an integrated circuit was of the order of a micron (˜1 μm). Devices then were provided with either a single layer or a double layer of aluminium alloy metallisation. The relatively large feature size meant that contacts could be formed from the aluminium, which had low resistance, and that any conductive connector formed between conductive layers was sufficiently wide to allow coverage using sputtered aluminium (such conductive connectors are commonly referred to as ‘vias’).
More recently, the trend has been towards smaller feature sizes (0.13 microns as of 2001) and to multilevel metallisation. Copper metallisation has replaced aluminium as the metallisation of choice. A viable alternative to copper is silver.
The increased number of layers (as many as eight layers in logic chips) places additional pressure upon the reliability of vias that are themselves decreasing in width. There is a trend toward holes (either trenches or vias) of increasing aspect ratio, where aspect ratio may be defined as the ratio of the depth of a hole to the narrowest width of that hole. Often the most pronounced reliability requirements are in the lower metal layers where the pitch and aspect ratio conditions are most demanding.
Copper is not a perfect material however, it does have an inconveniently high diffusion rate which makes direct deposition of a copper layer on a dielectric substrate impractical. Diffusion of copper into a substrate, for example silicon or SiO2, can create deep-level defects, electrical leakage between metal lines and at the very least reduces the resistivity of the substrate. Typically, a diffusion barrier layer is deposited over regions where copper is to be deposited, thereby preventing copper particles from degrading the properties of the substrate. Materials used in the barrier layer are generally refractory metals or their nitrides: for example Ta(N), Ti(N), W(N), or a multilayer of a combination of these materials.
Rather than etch a selected portion of a complete metal layer (subtractive metal etch patterning), the preferred method for patterning is the so-called damascene patterning process. Via and/or metal line patterns are etched into a dielectric layer. These etched holes are then inlaid with copper. When both types of hole are filled during the same deposition step, the patterning process is termed a dual damascene process.
The deposition of copper on integrated circuit substrates conventionally comprises of a number of steps, as illustrated in FIG. 1A. A diffusion barrier is first laid down upon the substrate 102. A thin seed layer of copper is then formed over the barrier generally using a dry process (for example chemical vapour deposition (CVD) or sputtering) 104. To cover the seed layer conformally, an electroless copper plating technique is often employed 108, and before electroless copper plating (from an ionic solution often including copper sulphate) can take place the substrate for deposition must generally be activated 106 by a catalytic surface (gold, platinum or palladium). During the activation process 106, the substrate is exposed to a solution of precursors of the catalyst, including often highly toxic reagents such as HF, HCl, and acetic acid, and the catalytic activation layer precipitates onto the substrate. Once activated, the substrate can be plated using the electroless technique 108. The enhanced conductive seed layer can then be used in a per process, electro copper plating (ECP) 110. To remove excess copper deposits a process known as chemical mechanical polishing (CMP) is employed 112. Typically, this involves the use of a polishing pad combined with a slurry compound. CMP therefore entails considerable mechanical stresses upon the substrate and metal.
Thin films of material are increasingly used in a large number of technologies ranging from electronics to optics to metallurgical coatings. Ideally, the functional properties of a thin film should be equivalent or superior to those of the bulk material. These properties are largely determined by the parameters employed in the deposition process. However, whatever the final application, there are properties that are desirable in all types of thin films. These properties include good adhesion to the substrate, reproducibility and sufficient mechanical strength and hardness. Further constraints are imposed depending upon the final application, for example, good optical properties for optical films, high microhardness for wear-resistant layers and dense porous-free films for corrosion-resistant coatings.
The formation of a conformal thin seed layer of copper is particularly acute when applied to the filling in of trenches or vias in the substrate (see FIG. 1B). As the reader will appreciate, conformal is a term of art. A conformal coating uniformly coats the substrate surface irrespective of the contours of the surface (i.e. vertical, horizontal or sloping).
The semiconductor industry currently uses a variety of vacuum coating process falling broadly into two types: physical vapour deposition (PVD) and (plasma enhanced) chemical vapour deposition ((PE)CVD). Both types of deposition technique are characterised by the comparatively high temperature required and by the often toxic, raw materials and by-products generated.
The PVD process mainly consists of evaporation and sputtering. Vacuum evaporation is a relatively simple process involving a system with a vacuum chamber, vacuum pumping system, a power supply and heating element, and a fixture to position the part over the source. Heat could also be generated by the more expensive electron beam method.
Sputtering is a well-known and versatile thin film deposition process. Material is sputtered from a source (target) onto a substrate. The process can produce many kinds of materials in a partial vacuum environment. Compared to evaporation, sputtering produces denser films with better adhesion to the substrate. It can also be scaled up easily.
Conventional magnetron sputtering has a low efficiency of ionization from energetic collision between the electrons and gas atoms leaving a high proportion of neutral particles. Most of the coating species reaching the wafer surface and trenches are not ionized and lack a preferred direction (in other words, the velocity distribution of the sputtered neutrals is substantially isotropic). The broad distribution of arrival angles and energy creates a seed layer deposition pattern in which the coating species preferentially coats the upper portion of the trench walls (a so-called overhang) with very little material reaching the bottom of the trench or the lower portions of the trench walls (see FIG. 2A).
Today's semiconductor industry has adopted a version of magnetron sputtering assisted by an inductively coupled plasma (ICP). An electromagnetic coil is immersed in a plasma and an rf signal is applied to the coil thereby creating a secondary plasma that ionises a significant proportion of the sputtered neutrals.
ICP assisted techniques seek to enhance the ionization rate and the directionality of incident coating species by comparison with the conventional magnetron sputtering deposition technique. ICP techniques provide a narrower distribution of arrival angles, which improves the covering the bottom of deep contact holes. Coating of the trench floor and overhang are reduced, however they are still present (see FIG. 2B).
The CVD process is a method of forming dense structure parts or coatings using the decomposition of relatively high vapour pressure gases. Gaseous compounds of the materials to be deposited are transported to a substrate surface where a thermal reaction/deposition occurs. By-products of the reaction are then expelled from the system. The process can generate high purity coatings and is a good conformal process for covering complicated objects. However, the process temperature is usually high (200-1000° C.). With few exceptions, the precursors are corrosive, hygroscopic, air sensitive and toxic. For this reason, the CVD process is generally carried out in closed systems.
The quality of CVD and PVD films is open to considerable improvement and alternative processes are under continual development. One alternative, the Cathodic Arc Deposition process, has received a lot of attention in recent years because of its ability to generate a much higher degree of ionisation than conventional technologies. Using this technique results in films that bond better and have higher density. This technique is normally used to apply wear-resistant coatings to machine tools. However, the substantial distribution of relatively large, typically neutral, multi-atom clusters (often referred to as macroparticles) associated with the process limits its usefulness. Macroparticles are characteristically particles visible under an optical microscope in a film deposited using cathodic arc methods.
During the past few years, a new deposition system, called the Filtered Cathodic Vacuum Arc (FCVA), has been developed. As the name suggests, FCVA includes a filtration step that substantially reduces the number of macroparticles carried with the plasma, thereby facilitating the production of nigh quality coatings and films, including Tetrahedral Amorphous Carbon (ta-C) and Al2O3 films. During deposition a plasma beam with neutral atoms and macroparticles is emitted from a cathodic arc spot by the cathodic vacuum arc process. The unwanted macroparticles and neutrals are then filtered out by cross-magnetic and electric fields. Only ions within a well-defined energy range are allowed to reach the substrate. High-quality films can be produced by this technique which satisfies the general requirements for all applications—that the deposited films adhere well on a substrate and have good properties that are predictable and reproducible.
Compared to the conventional PVD and CVD techniques, FCVA produces 100% ionised coating species with well-defined and tuneable energy. The technique produces some unique films, such as ta-C film and nigh quality Al2O3 film, that can not be produced by other techniques.
Filing or coating vias and trenches with copper presents problems for all known deposition techniques. It is therefore an object of the invention to overcome or at least ameliorate the aforementioned problems.